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analog ic design course

analog ic design course
flexible workload of 4 to 360h
valid certificate in your country

What will I learn?

This course offers a quick practical guide to analog IC design from specifications to tapeout-ready layouts. Learners will set noise gain bandwidth and power goals select appropriate architectures and size transistors plus bias networks in 130/180 nm processes. It covers layout matching methods key simulations mixed-signal verification and a checklist for reliable first-time silicon success.

Elevify advantages

Develop skills

  • Define analog specifications including noise gain bandwidth and power for sensor applications.
  • Perform transistor-level design sizing devices bias networks and output stages in 130/180nm technology.
  • Conduct stability and noise analysis with AC noise Monte Carlo and PVT simulations.
  • Implement precision layout using matching shielding and low-parasitic techniques.
  • Complete post-layout sign-off with extraction mixed-signal verification and tapeout checks.

Suggested summary

Before starting, you can change the chapters and the workload. Choose which chapter to start with. Add or remove chapters. Increase or decrease the course workload.
Workload: between 4 and 360 hours

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