Integrated Circuits Course
This course teaches designing low-power CMOS sensor amplifiers in 180 nm and 130 nm technologies. Learners master op-amp topologies, transistor sizing with hand calculations, noise and offset management, PVT variations, layout-aware design, verification, and trade-offs to ensure first-time silicon success in real-world analog front-ends.
from 4 to 360h flexible workload
valid certificate in your country
What will I learn?
Gain expertise in designing low-power CMOS sensor amplifiers for 180 nm and 130 nm processes. Define specifications, select op-amp topologies, size transistors using hand calculations, manage noise, offset, and PVT effects, and apply layout and verification for reliable ICs that succeed on first silicon.
Elevify advantages
Develop skills
- Choose CMOS op-amp topologies for low-power, low-noise performance.
- Size transistors for analog design in 130 nm and 180 nm processes.
- Perform first-order hand calculations for IC gain, bandwidth, and noise.
- Define specifications for sensor amplifier front-ends.
- Apply layout, PSRR, ESD, and integration techniques for robust ICs.
Suggested summary
Before starting, you can change the chapters and workload. Choose which chapter to start with. Add or remove chapters. Increase or decrease the course workloadWhat our students say
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