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computer structure course

computer structure course
flexible workload of 4 to 360h
valid certificate in your country

What will I learn?

This course offers a straightforward look at how modern CPUs are built, covering pipelines, register files, ALU design, caches, memory systems, buses, and memory-mapped I/O. You'll dive into interrupts, DMA, managing latency, power-saving methods, real-world compromises, timing analysis, and documentation to confidently design strong, efficient embedded systems.

Elevify advantages

Develop skills

  • Design energy-efficient CPUs using RISC principles, pipelining, and clock gating for IoT applications.
  • Optimise memory systems by selecting appropriate cache sizes, TCM, and DRAM for better performance and power use.
  • Build reliable pipelines that manage hazards, branches, interrupts, and exceptions effectively.
  • Implement I/O and DMA systems, including peripheral mapping, ISR design, to reduce latency and power draw.
  • Define complete microarchitectures with buses, ALUs, registers, and interfaces ready for RTL implementation.

Suggested summary

Before starting, you can change the chapters and the workload. Choose which chapter to start with. Add or remove chapters. Increase or decrease the course workload
Workload: between 4 and 360 hours

What our students say

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