Lesson 1Microcontroller families comparison: AVR, PIC, ARM Cortex-M (M0/M3/M4) — performance, peripherals, and ecosystemThis lesson compares main microcontroller families. You will check AVR, PIC, and ARM Cortex-M devices for performance, peripherals, tools, ecosystem, cost, and fit for communication-focused embedded designs.
AVR architecture, strengths, and use casesPIC families and typical application domainsARM Cortex-M cores: M0, M3, and M4 featuresEcosystem, tools, and community supportPeripherals, memory, and performance scalingCost, availability, and long-term lifecycleLesson 2Basic firmware safety: watchdog timer usage, fault reporting, and robust reset strategiesThis lesson focuses on basic firmware safety tools. You will set up watchdog timers, design safe reset and recovery flows, add fault reporting, and make sure unexpected hangs or bad states are caught and fixed.
Watchdog timer configuration and feedingDetecting and handling lockups and dead loopsBrown-out, POR, and external reset handlingStoring reset cause and fault contextNonvolatile logging of critical failuresSafe restart and degraded operation modesLesson 3GPIO and peripheral budgeting: ADC channels, UART/SPI/I2C ports, timers, interrupts and DMA planningThis lesson covers assigning GPIOs and on-chip peripherals to system needs. You will plan ADC channels, serial ports, timers, interrupts, and DMA to avoid clashes, allow growth, and meet real-time needs.
Creating a complete signal and pin inventoryMapping ADC channels to sensors and referencesAllocating UART, SPI, and I2C for peripheralsTimer allocation for PWM, capture, and timebaseInterrupt priority and nesting considerationsPlanning DMA channels for high data throughputLesson 4Essential MCU hardware choices: supply voltage, clock source (internal RC, crystal, external oscillator), and power domainsThis lesson guides key MCU hardware picks. You will check supply voltage ranges, clock source options, and power domains, thinking about performance, noise, analog accuracy, and matching with sensors, radios, and external logic.
Selecting core supply voltage and regulatorsI/O voltage levels and level shifting needsInternal RC oscillator pros and consCrystal and external oscillator selectionSeparating analog and digital power domainsDecoupling and ground layout implicationsLesson 5Clocking and timing: selecting clock source, configuring system tick, low-power modes and wake sourcesThis lesson explains clock tree and timing setup. You will pick clock sources, set PLLs, configure system tick, and design low-power modes and wake sources while meeting timing, jitter, and power needs.
Clock tree overview and configuration stepsPLL, prescalers, and frequency trade-offsSystem tick configuration and timekeepingTimer usage for delays and schedulingLow-power sleep and stop mode selectionWakeup sources and latency managementLesson 6ADC driver design: sampling sequence, oversampling, averaging, and conversion timingThis lesson details ADC driver design for accurate readings. You will plan sampling sequences, set triggers, use oversampling and averaging, manage conversion timing, and reduce noise with hardware and firmware methods.
ADC reference selection and calibrationChannel sequencing and scan configurationSampling time and trigger source selectionOversampling, averaging, and filteringDMA-based ADC data acquisitionMitigating noise and crosstalk in readingsLesson 7Embedded power management: sleep modes, brown-out detection, RTC for wakeups, and battery considerationsThis lesson addresses embedded power management plans. You will use sleep modes, brown-out detection, and RTC wakeups, and think about battery type, capacity, and life for reliable low-power communication systems.
Sleep mode selection and entry criteriaRTC configuration for timed wake eventsBrown-out detection thresholds and actionsMeasuring and budgeting average currentBattery chemistry and discharge behaviorDesigning for long battery life and safetyLesson 8Firmware architecture and flow: boot, peripheral init, sensor read routine, error handling, data formatting, comms schedulingThis lesson shows overall firmware structure from reset to normal work. You will design boot flow, peripheral startup, sensor read loops, error paths, data formatting, and communication scheduling for steady behavior.
Boot sequence and startup code overviewPeripheral and middleware initialization orderDesigning periodic sensor read tasksCentralized error handling and logging pathsData formatting, scaling, and unit handlingCooperative scheduling and main loop designLesson 9Communication driver design: UART, SPI, I2C stacks; polling vs interrupt vs DMA approachesThis lesson explains building reusable UART, SPI, and I2C drivers. You will compare polling, interrupt, and DMA ways, define driver APIs, handle errors and timeouts, and fit drivers into higher-level protocol stacks.
Layered architecture for serial driversUART driver: framing, buffering, and flow controlSPI driver: modes, chip select, and throughputI2C driver: addressing, arbitration, and retriesPolling versus interrupt-driven transfersDMA-based transfers and ring buffer design
