analog design course
Gain expertise in designing robust analog front-ends for 12-bit SAR ADC systems. Transform high-level specifications into reliable circuits by sizing components accurately, performing essential simulations like AC, transient, noise, and Monte Carlo analyses, and validating silicon performance. Ensure your sensor-to-ADC chains achieve precise gain, low noise, high linearity, and stability across PVT variations with full confidence in repeatable outcomes.

from 4 to 360h flexible workload
valid certificate in your country
What will I learn?
This course provides a clear pathway from design specifications to fully validated silicon chips. Participants learn to convert system requirements into key front-end performance metrics, select and size components effectively, and optimise for noise, gain, bandwidth, and linearity in a 12-bit SAR ADC signal chain. Hands-on practice includes reliable simulation techniques, PVT and Monte Carlo analyses, plus lab validation using structured checklists, documentation, and test plans for consistent results.
Elevify advantages
Develop skills
- Develop analog front-end specifications by quickly converting system-level ADC goals into detailed block requirements.
- Master noise and linearity optimisation through budgeting, simulation, and verification of THD, INL, and DNL for 12-bit SAR performance.
- Build effective simulation workflows with AC, transient, noise, and Monte Carlo testbenches that deliver passing results.
- Design efficient sensor-to-ADC architectures featuring low-noise differential signal chains up to 1.2V SAR inputs.
- Create comprehensive silicon validation plans including tests, trims, and lab setups for dependable analog design approval.
Suggested summary
Before starting, you can change the chapters and the workload. Choose which chapter to start with. Add or remove chapters. Increase or decrease the course workload.What our students say
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