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VLSI Design Course
Bula ditsela tsa bokgoni mo tirong ya gago ya go thala ka Khoso ya rona ya Go Thala di-VLSI, e e diretsweng batho ba ba tlhwaafetseng go itse ka botlalo dilo tse di raraaneng tsa Very Large Scale Integration. Ithute ka botlalo dilo tsa botlhokwa tsa Dipuo tsa Tlhaloso ya Hardware, go akaretsa VHDL le Verilog, mme o ithute go rulaganya le go beakanya khoutu ya HDL ka boitumelo. Iponele ka bowena ka go thala di-ALU, didiriswa tsa go etsa, le mekgwa ya go baakanya diphoso. Tokafatsa bokgoni jwa gago mo go kwalong mekwalo ya boranyane le go bega, go tlhomamisa gore o nna kwa pele mo lefatsheng le le golang ka bonako la ditsamaiso tsa VLSI.
- Ithute go kwala khoutu ya HDL: Rulaganya le go beakanya khoutu ya HDL e e dirang sentle go tsamaiso tsa VLSI.
- Dintlha tsa botlhokwa tsa VLSI: Ithute hisitori, kgolo, le megopolo ya botlhokwa ya go thala di-VLSI.
- Go kwala mekwalo ya boranyane: Tlhama mekwalo le dipego tsa boranyane tse di tlhamaletseng e bile di dira sentle.
- Bokgoni jwa go etsa: Dirisa didiriswa tsa go etsa go baakanya diphoso le go tlhomamisa dithalo tsa ALU.
- Popego ya ALU: Tlhaloganya dikarolo tsa ALU mme o dire ditiro tsa motheo tsa lojiki.
from 4 to 360h flexible workload
certificate recognized by MEC
What will I learn?
Bula ditsela tsa bokgoni mo tirong ya gago ya go thala ka Khoso ya rona ya Go Thala di-VLSI, e e diretsweng batho ba ba tlhwaafetseng go itse ka botlalo dilo tse di raraaneng tsa Very Large Scale Integration. Ithute ka botlalo dilo tsa botlhokwa tsa Dipuo tsa Tlhaloso ya Hardware, go akaretsa VHDL le Verilog, mme o ithute go rulaganya le go beakanya khoutu ya HDL ka boitumelo. Iponele ka bowena ka go thala di-ALU, didiriswa tsa go etsa, le mekgwa ya go baakanya diphoso. Tokafatsa bokgoni jwa gago mo go kwalong mekwalo ya boranyane le go bega, go tlhomamisa gore o nna kwa pele mo lefatsheng le le golang ka bonako la ditsamaiso tsa VLSI.
Elevify advantages
Develop skills
- Ithute go kwala khoutu ya HDL: Rulaganya le go beakanya khoutu ya HDL e e dirang sentle go tsamaiso tsa VLSI.
- Dintlha tsa botlhokwa tsa VLSI: Ithute hisitori, kgolo, le megopolo ya botlhokwa ya go thala di-VLSI.
- Go kwala mekwalo ya boranyane: Tlhama mekwalo le dipego tsa boranyane tse di tlhamaletseng e bile di dira sentle.
- Bokgoni jwa go etsa: Dirisa didiriswa tsa go etsa go baakanya diphoso le go tlhomamisa dithalo tsa ALU.
- Popego ya ALU: Tlhaloganya dikarolo tsa ALU mme o dire ditiro tsa motheo tsa lojiki.
Suggested summary
Before starting, you can change the chapters and the workload. Choose which chapter to start with. Add or remove chapters. Increase or decrease the course workload.What our students say
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