Analog circuit design course

Lesson 1 • AC Steady-State Circuit Analysis

Phasor representation converts sinusoidal circuits into algebraic problems. Students apply impedance concepts to analyse AC power and phase relationships.

Lesson 2 • Network Theorems and Simplification

Thevenin, Norton, and maximum power transfer theorems simplify complex networks. These tools are essential for amplifier biasing and load analysis.

Lesson 3 • DC Circuit Analysis Techniques

Nodal and mesh analysis methods solve multi-loop DC networks systematically. Mastery here enables efficient analysis of complex analog topologies.

Lesson 4 • Frequency Response and Bode Plots

Transfer functions describe circuit gain and phase versus frequency. Bode plot construction prepares students for filter and amplifier bandwidth analysis.

Lesson 1 • Diode Physics and Characteristics

P-N junction theory explains forward bias, reverse bias, and breakdown behaviour. Diode I-V curves guide rectifier and protection circuit design.

Lesson 2 • MOSFET Device Physics and Models

NMOS and PMOS threshold voltage, channel formation, and drain current equations are derived. MOSFET small-signal models parallel BJT analysis for amplifier design.

Lesson 3 • Bipolar Junction Transistor Fundamentals

BJT current gain, operating regions, and biasing establish the basis for amplifier design. Large-signal models predict DC operating points accurately.

Lesson 4 • BJT Small-Signal Models

The hybrid-pi and T-models linearise BJT behaviour around the Q-point for AC analysis. These models directly enable amplifier gain and impedance calculations.

Lesson 1 • Common-Base and Common-Gate Amplifiers

Low input impedance and high bandwidth characterise these current-input configurations. They complement common-emitter stages in cascode and RF amplifier designs.

Lesson 2 • Emitter and Source Follower Configurations

Unity-gain buffers with high input impedance and low output impedance drive loads without signal loss. Followers are essential for impedance matching between stages.

Lesson 3 • Common-Emitter and Common-Source Amplifiers

Voltage gain, input resistance, and output resistance are derived using small-signal models. These inverting topologies form the core of most analog signal chains.

Lesson 4 • Biasing Strategies for Stable Operation

Stable Q-point design resists beta variation and temperature drift using feedback biasing. Proper biasing is prerequisite to predictable small-signal amplifier performance.

Lesson 1 • Differential Pair Analysis

Differential and common-mode gains are derived for BJT and MOSFET pairs. CMRR quantifies rejection of noise common to both inputs, a key performance metric.

Lesson 2 • Output Stage Design for Load Driving

Class A, AB, and B output stages trade efficiency for linearity when driving low-impedance loads. Crossover distortion analysis guides bias current selection in push-pull stages.

Lesson 3 • Current Mirrors and Active Loads

Current mirrors replicate bias currents with high accuracy and serve as active loads to boost gain. Cascode and Wilson mirrors improve output resistance significantly.

Lesson 4 • Cascode Amplifier Topologies

Stacking a common-gate stage above a common-source stage raises output resistance and bandwidth. Cascode structures are fundamental to high-gain op-amp input stages.

Lesson 1 • Summing, Difference, and Instrumentation Amplifiers

Weighted summing amplifiers combine multiple signals; difference amplifiers reject common-mode voltages. Instrumentation amplifiers provide high CMRR for sensor signal conditioning.

Lesson 2 • Inverting and Non-Inverting Configurations

Closed-loop gain, input resistance, and output resistance are derived for both configurations. Resistor ratio selection sets precise gain with minimal sensitivity to op-amp parameters.

Lesson 3 • Ideal Op-Amp Model and Golden Rules

Infinite gain, infinite input impedance, and zero output impedance define the ideal model. Virtual short and virtual open rules enable rapid closed-loop circuit analysis.

Lesson 4 • Real Op-Amp Non-Ideal Parameters

Offset voltage, bias current, CMRR, PSRR, and slew rate limit real circuit performance. Compensation techniques minimise errors introduced by non-ideal op-amp behaviour.

Lesson 1 • Compensation Techniques for Stability

Dominant-pole, lead, and lag compensation reshape loop gain to achieve adequate phase margin. Miller compensation is analysed as the standard technique in two-stage op-amps.

Lesson 2 • Stability Criteria and Bode Analysis

Gain margin and phase margin from Bode plots predict closed-loop stability and peaking. Nyquist criterion provides a complete stability test for complex loop responses.

Lesson 3 • Feedback Fundamentals and Benefits

Negative feedback reduces gain sensitivity, distortion, and noise while modifying impedances. Understanding loop gain T is prerequisite to all stability and compensation analysis.

Lesson 4 • Four Feedback Topologies

Series-shunt, shunt-shunt, series-series, and shunt-series topologies each modify input and output impedances differently. Correct topology identification is essential for accurate analysis.

Lesson 1 • State-Variable and Biquad Filter Circuits

State-variable filters simultaneously provide low-pass, high-pass, and bandpass outputs with independent Q and frequency tuning. Biquad topology offers superior component sensitivity.

Lesson 2 • First and Second-Order Filter Sections

First-order RC sections and second-order biquad sections are the building blocks of all higher-order filters. Quality factor Q and natural frequency determine biquad frequency response shape.

Lesson 3 • Higher-Order Filter Cascade Design

Higher-order filters are realised by cascading first and second-order sections with tabulated pole locations. Gain scaling and dynamic range optimisation prevent internal clipping.

Lesson 4 • Filter Specifications and Approximations

Passband ripple, stopband attenuation, and transition bandwidth define filter requirements. Butterworth, Chebyshev, and Bessel approximations offer distinct gain-phase trade-offs.

Lesson 1 • Amplifier Noise Models and Noise Figure

Input-referred noise voltage and current model amplifier noise independently of gain. Noise figure quantifies SNR degradation and guides low-noise amplifier design.

Lesson 2 • Harmonic and Intermodulation Distortion

Nonlinear device characteristics generate harmonic and intermodulation distortion products. THD and IMD specifications quantify linearity and guide operating point selection.

Lesson 3 • Low-Noise Amplifier Design Techniques

Transistor sizing, bias current optimisation, and source impedance matching minimise noise figure. Feedback and cascode topologies balance noise performance with gain and bandwidth.

Lesson 4 • Fundamental Noise Sources in Circuits

Thermal noise in resistors, shot noise in junctions, and flicker noise in MOSFETs set the noise floor. Noise spectral density and noise bandwidth determine total integrated noise power.